Dr. Philip Brisk (UCR) inspires SNE Lab with lecture on Processor Microarchitecture
On December 11, 2017 dr. Philip Brisk from the University of California, Riverside (UCR) visited the System and Network Engineering Lab (SNEL) of the Informatics Institute at the University of Amsterdam.
For an audience consisting of SNEL researchers and professors, dr. Brisk gave a lecture about predictive models for Graphic Processing Units (GPU) performance. Kenneth O’Neal (UCR PhD student and Intern Intel’s Strategic CAD Labs), Michael Kishinvesky, Emily Shriver, Zach Waters and Ahmed Abousamra (Intel Strategic CAD Labs) contributed to the talk.
Untenable cycle-accurate simulations
For the past 30 years research on processor microarchitecture has been dominated by cycle-accurate simulation. This situation has become untenable due to increasing processor complexity and a never-ending desire to characterize the performance of more and more workloads.
The next step
To sacrifices accuracy and reduce simulation time, workloads has to be characterized by using statistical models, and to restrict the use of simulators to model training and only characterizing the most promising design points. During the lecture dr. Philip Brisk presented results from a four-year collaboration with Intel Strategic CAD labs, which validated the use of predictive models for GPU performance.
Workloads running on current-generation GPU
The key innovation underlying the approach is that performance statistics collected from representative workloads running on current-generation GPUs or functional simulators can effectively predict the performance of next-generation GPUs whose microarchitectures are presently under development. Intel set a threshold of 80% model accuracy (20% out-of-sample error) as a success target for this project.
Less than 8.91% out-of-sample error
Experiments were performed using Intel’s internal GPU simulator using commercial DirectX 3D rendering workloads chosen and characterized by Intel. When predicting performance across three Intel GPU generations (Haswell, Broadwell, Skylake), the models achieved 7.45% to 8.91% out-of-sample error, while running tens of thousands of times faster than cycle-accurate simulation. A detailed ranking of the most impactful features selected for these models provides insight as to which microarchitectural subsystems have the greatest impact on performance from one generation to the next.
Dr. Philip Brisk got a Bachelor’s, Master’s and PhD degrees in Computer Science at UCLA. From 2006-2009 he was a Postdoctoral Scholar at EPFL in Switzerland. He has been with UC Riverside since 2009. His research interests includes Computer Architecture, FPGA’s and Reconfigurable Computing, and Programmable Microfluidics.